Rushton, Andrew. <br/><br/>
VHDL for logic synthesis / 
Andrew Rushton. 
 - 3rd ed. 
 - Chichester, West Sussex, U.K. :  Wiley,  2011. 
 - xvi, 466 p. :  ill. ;  25 cm. 
<br/><br/><label>ISBN: </label>9780470688472 
<br/><br/><label>Subjects--Topical Terms: </label><br/>VHDL (Computer hardware description language)<br/>Logic design--Data processing.<br/>computer-aided design.
<br/><br/><label>Dewey Class. No.: </label>621.395  / R954V