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Computer architecture [electronic resource] / Blanchet, Gérard;Dupouy, Bertrand.

By: Call Number: Ebook Contributor(s): Material type: TextLanguage: English Publication details: WILEY, 2013.Description: 380 pISBN:
  • 9781848214293
  • 9781118577790
Subject(s): Online resources:
Contents:
Chapter, Lesson, Part Part 1. Elements of a basic architecture.
Chapter, Lesson, Part Chapter 1. Introduction.
Chapter, Lesson, Part Chapter 2. The basic modules.
Chapter, Lesson, Part Chapter 3. The representation of information.
Chapter, Lesson, Part Part 2. Programming model and operation.
Chapter, Lesson, Part Chapter 4. Instructions.
Chapter, Lesson, Part Chapter 5. The processor.
Chapter, Lesson, Part Chapter 6. Inputs and outputs.
Chapter, Lesson, Part Part 3. Memory hierarchy.
Chapter, Lesson, Part Chapter 7. Memory.
Chapter, Lesson, Part Chapter 8. Caches.
Chapter, Lesson, Part Chapter 9. Virtual memory.
Chapter, Lesson, Part Part 4. Parallelism and performance enhancement.
Chapter, Lesson, Part Chapter 10. Pipeline architectures.
Chapter, Lesson, Part Chapter 11. Example of an architecture.
Chapter, Lesson, Part Chapter 12. Caches in a multiprocessor environment.
Chapter, Lesson, Part Chapter 13. Superscalar architectures.
Chapter, Lesson, Part Part 5. Appendices.
Chapter, Lesson, Part Appendix a. Hints and solutions.
Chapter, Lesson, Part Appendix b. Programming models.
Cover, Title,Computer architecture--Preface, Introduction, TOC,Table of contents--Preface, Introduction, TOC,Preface--References, Appendix, Index,Bibliography--References, Appendix, Index,Index.
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Chapter, Lesson, Part Part 1. Elements of a basic architecture.

Chapter, Lesson, Part Chapter 1. Introduction.

Chapter, Lesson, Part Chapter 2. The basic modules.

Chapter, Lesson, Part Chapter 3. The representation of information.

Chapter, Lesson, Part Part 2. Programming model and operation.

Chapter, Lesson, Part Chapter 4. Instructions.

Chapter, Lesson, Part Chapter 5. The processor.

Chapter, Lesson, Part Chapter 6. Inputs and outputs.

Chapter, Lesson, Part Part 3. Memory hierarchy.

Chapter, Lesson, Part Chapter 7. Memory.

Chapter, Lesson, Part Chapter 8. Caches.

Chapter, Lesson, Part Chapter 9. Virtual memory.

Chapter, Lesson, Part Part 4. Parallelism and performance enhancement.

Chapter, Lesson, Part Chapter 10. Pipeline architectures.

Chapter, Lesson, Part Chapter 11. Example of an architecture.

Chapter, Lesson, Part Chapter 12. Caches in a multiprocessor environment.

Chapter, Lesson, Part Chapter 13. Superscalar architectures.

Chapter, Lesson, Part Part 5. Appendices.

Chapter, Lesson, Part Appendix a. Hints and solutions.

Chapter, Lesson, Part Appendix b. Programming models.

Cover, Title,Computer architecture--Preface, Introduction, TOC,Table of contents--Preface, Introduction, TOC,Preface--References, Appendix, Index,Bibliography--References, Appendix, Index,Index.

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